The present invention relates to a program execution method which is utilized in a multiprocessor system including a plurality of computers having partially different architectures.
In a prior art compiler, object programs are generated according to the hardware specifications of computers which execute the object programs. When one of the computers is improved and machine instructions are added to increase the processing capability thereof, the existing object programs cannot be executed in the improved computer in some cases or a sufficient performance cannot be achieved in the improved computer even if they are executable therein.
For example, in case of the HITACHI's large-sized computers M-200H with an Integrated Array Processor, the M-280H with an Integrated Array Processor, and the S-810 High Speed Array Processor, scalar processing is executable at any of the processors; however, the vector processing is the same among them because the hardware of the computers for vector processing have been improved from the M-200H to the M-280H and from the M-280H to the S-810 and hence the ranges of available vector processing machine languages are different among them. In this regard, refer to the "Optimizing FORTRAN77", HITACHI Review, vol 30, No. 5, 1981 by R. Takanuki and "Compiling algorithm and techniques for the S-810 vector processor:, ICPP, '84 by M. Yasumura.
Therefore, the same problem as described above arises with a system which includes computers having partially different architectures for the scalar processing.
Although the source program compatibility is retained among the computers, the compatibility at the object level is not realized; consequently, the user must manage the programs at the source program level. In order to implement the program management at the object program level, it is necessary to generate and manage the object programs separately for plural processors.